About Us

Xceler Processors and System Solutions provide the muscle to run Machine-Learning and AI Algorithms on the Edge


FPGA implementation of the Graph Engine provide an average of 6 x speedup (Running at 100 MHz) over the same program running on 32-bit ARM processors running at 1 GHz

For specific applications such as BLAS routines and DSP routines the speedup is several orders of magnitude over regular processors and DSP

  • Easy to Use

    • Adaptive, Programmable
    • Standard Programming languages and design entry (C/C++, python in future)
  • Unique architecture

    • Array of interconnected neurons
    • No need for a supervisor or control processor in most applications
    • Field Programmable Neuromorphic Array
  • Low Power High Performance

    • FPGA based solutions now
    • ASIC coming soon
    • Low power consumption
    • Expandable using multiple instances
    • High Performance


Potential Applications